CEVA’s connectivity solution suite for storage systems is made up of both SATA (AHCI-Host and Device-side) and SAS (Initiator and Target-side) IPs, all developed via extensive experience with multiple licensees and in volume production.
Each of the IPs are provided as RTL IP packages, and each consists of Link and Transport layers as defined by the relevant specification. The packages are coupled with a very flexible PHY Control layer for connecting with various third-party PHY/SerDes IPs.
At the system chip interface, the IPs present a high-performance DMA engine on the data path, as well as a hardware-accelerated Command layer, all of which are built with an architecture that provides high performance with low processor loading.
The CEVA-SAS and CEVA-SATA IPs support the latest technologies and protocols and allow rapid development of highly differentiated solutions for a wide range of storage applications
- SATA3 functionality that supports 6/3/1.5 Gbps
- SAS3 functionality that supports 12/6/3/1.5 Gbps
- The SATA Host IP supports standard AHCI compatibility with hardware-accelerated NCQ, FPDMA, and FIS-based switching
- The SATA Device IP supports hardware-accelerated streaming NCQ commands and ICC timers, as well as advanced cache interfacing specifically for SSD implementations
- SAS supports SSP/SMP/STP for Initiator and SSP/SMP for Target, with narrow/wide ports
- Robust data-path protection mechanisms, including overlapping CRC/Parity and DIF
- AHB/AXI bus interfaces, up to 128 bits
- Suitable for integration with third-party PHY/SerDes, including FPGA-embedded SerDes