Graduate Verification IC Design Engineer
Bristol, United Kingdom
Job Description
  • IC verification employing state of the art verification methodologies, tools and infrastructure
  • Writing verification plans for system modules and system integration
  • Planning, execution, tracking, verification closure, and delivery of IP platforms
  • Developing and maintaining CAD scripts
Requirements

Essential Criteria:

  • a minimum 2.1 Honours degree or higher in electronics or software engineering (with preference given to MENG)
  • 1+ years of experience in verification of FPGAs or ICs
  • Good understanding of state of the art verification techniques, including assertion-based, constrained random and metric-driven verification
  • Demonstrable experience with verification management tools and verification regression
  • Team player with excellent communication abilities to liaise with customers and other CEVA design offices.
  • Able to travel to customer sites and other CEVA sites
  • Eligible to work in the EU

 

Desirable Criteria:

  • Experience in verification of FPGAs or ICs
  • Experience in development of Specman-e, System-Verilog or similar testbenches
  • Experience with formal property checking tools for example Cadence IFV
  • Experience in TCL or PERL/Python scripting languages
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