CEVA-X2 is an advanced DSP/Controller aimed at high-end multi-standard cellular baseband and intensive sound processing applications. It has been specifically designed to tackle mobile broadband Physical Layer (PHY) control, intensive multi-microphone speech processing and cutting-edge audio workloads.

The CEVA-X2 is based upon a VLIW/SIMD architecture with a 10 stage pipeline operating at 1.5GHz within a 16nm process. Other key features include 4.5 CoreMark/MHz score, quad 16×16 MAC operations per cycle, dual 32×32 MAC operations per cycle, 64-bit SIMD fixed-point operations and up to two IEEE single-precision floating-point units operating in parallel.

The processor includes two Scalar Processing Units (SPU) which supports 8/16/32/64 bit data types for ALU operations, it includes static branch prediction and optional dynamic branch prediction, and offers both supervisor and user modes.

At a system level the CEVA-X2 includes a 2-way or 4-way set-associative data cache with write-through and write-back policies as well as hardware and software pre-fetch capabilities.
CEVA-Connect manages the data traffic and ensures intelligent scheduling leading to high Quality of Service (QoS) and low latency. Dedicated hardware control and data planes minimize the load on the processor.



The CEVA-X2 processor is a fully featured DSP/Controller boasting an advanced VLIW/SIMD architecture that is part of the scalable CEVA-X family.

Inbuilt Power Scaling Unit (PSU 2.0) ensures power optimization for prolonged battery life
High-throughput DSP addresses complex wireless and sound applications
CEVA-Connect schedules data transfers and frees up the processor for higher-level tasks

Main Features

  • Unified DSP/Controller with two SPUs
  • Flexible data plane processing with 8/16/32/64-bit native C data types support
  • Highly efficient controller with a 4.5 CoreMark/MHz score
  • Advanced Instruction and Data cache architecture with ACE coherency support

Block Diagram

CEVA-X2 Block Diagram

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