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CEVA-XC High-Performance, Low-Power DSP Cores for Advanced Wireless Communications

Digital signal processing is a key technology that is powering many of today’s fastest growing electronics markets. CEVA is the world's leading licensor of programmable DSP Cores and Platforms and Solutions.

CEVA-XC applicationsThe CEVA-XC family of DSP cores features a combination of VLIW (Very Long Instruction Word) and Vector engines that enhances typical DSP capabilities with advanced vector processing. Based on the architecture of the CEVA-X DSP family, the CEVA-XC family of DSP cores incorporates up to four modular Vector Communication Units into the CEVA-X framework. The scalable CEVA-XC architecture offers a selection of highly powerful communication processors targeting the most demanding wireless applications and use cases, enabling software-defined modem design with minimal hardware. With its innovative programmable approach, the CEVA-XC family offers high flexibility that supports a large number of wireless standards on a single programmable platform, thereby significantly reducing development cost and time to market.

The CEVA-XC architecture is supported by the CEVA-toolbox, an optimizing tool chain that includes a C-Compiler with dedicated support for Vector Processors. Alongside the DSP platform and tool chain, CEVA also offers a complete set of communication and DSP libraries as well as complete reference architectures for terminals and wireless infrastructure.

Which CEVA-XC DSP core is right for me?


A multi-mode communication processor for advanced wireless applications. The second generation of the CEVA-XC family, the CEVA-XC323, is a highly powerful processor that is optimized for wireless terminals and infrastructure applications. The CEVA-XC323 is a true Software-Defined Radio (SDR) platform, supporting multiple wireless baseband standards (including LTE TDD, LTE FDD, LTE-A, WiMAX, HSPA/+) completely in software.


A highly powerful vector processor for a range of advanced communication applications including: mobile, home networking, infrastructure, automotive and smart-grid. The CEVA-XC4210 delivers highly powerful vector capabilities alongside a general computation engine to supply the performance and flexibility demanded by next generation communication applications.


A scalable multicore architecture for a range of macrocells, small cells, cloud-RAN, DFE/DPD/ and more. The fourth generation of the widely licensed CEVA-XC architecture, the CEVA-XC4500 is specifically optimized for next generation wireless infrastructure applications. The CEVA-XC4500 delivers highly powerful fixed point and floating point vector capabilities supplying the performance and flexibility demanded by next generation wireless infrastructure applications.

CEVA-XC Evolution

Target markets for the CEVA-XC family

Wireless Terminals

  • Handsets, smartphones, tablet computers, data cards, etc.
  • Addresses LTE, LTE-A, WiMAX, HSPA/+, and legacy 2G/3G standard

Wireless Infrastructure

  • A scalable solution for femtocells up to macrocells

Connectivity and Wi-Fi

  • A flexible connectivity platform supporting Wi-Fi 802.11a/b/g/n/ac, GNSS, Bluetooth and more

Universal DTV Demodulator

  • A programmable solution targeting digital TV and digital radio demodulation in software
  • Addresses DVB-T, DVB-T2, ISDB-T, ATSC, DTMB, etc.

Other communication applications:

  • White-space, DSL, VDSL, MoCA, G.hn, PLC (Power Line Communication), and more

CEVA-XC Family Technical Highlights

The CEVA-XC provides an architectural framework offering the generation of a selection of communication processors targeting different applications and use cases.

Features Benefits
Offers extreme processing capabilities including:
  • Up to 128 16x16 MACs
  • Up to 128 16-bit arithmetic operations
  • Over 800 16-bit operations in a single cycle
  • Dedicated support for bit-chain processing of up to 1K bit in a single cycle
  • Advanced complex arithmetic capabilities
  • Native support for Division/SQRT/iSQRT, Viterbi decoding, FEC encoding, advanced MIMO detectors, FFT and more
Meets the requirements of the most advanced communication standards including LTE, LTE-A, HSPA+, Wi-Fi 802.11ac, etc.
Instruction Set Architecture (ISA) is well-optimized for communication applications High efficiency for wide range of communication standards
Incorporates vector and non-vector units; the number of vector units is scalable (1, 2, or 4 vector units) each of which operates on 256-bit vectors Offers complete software support for application modem processing including: data processing, control code, memory accesses, general DSP operations and system code, etc.
Multiple configurations with optional instruction sets and modules Applicability for different applications, markets, and use cases at optimal cost
Accompanied with an advanced optimizing tool chain, a complete set of multi-standard communication libraries, and optimized reference platforms Advanced software development flow, accelerating time-to-market
Incorporates an advanced Power Scaling Unit (PSU) and other power saving mechanisms Ultra-low power consumption enabling the support of the most demanding standards in software in battery-powered devices