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The CEVA-MM3101 is a Programmable, Low Power Imaging and Vision Platform for Camera-Enabled Devices

CEVA-MM3101Leading mobile device OEMs (smartphones, tablet computers, portable media players, portable gaming consoles, etc.) are desperate to differentiate their products from the competition. One way in which to do this is by providing high quality Image Signal Processing (ISP) and supporting sophisticated vision processing applications such as image and scene analysis.

Furthermore, in the home entertainment market, the emergence of smart Digital Televisions is driving designers to support state-of-the-art capabilities such as gesture recognition and face detection, recognition and beautification. These devices also need to provide enhanced encoders for video conferencing and special post-processing functions for display.

Based on the CEVA-MM3000 architectural framework, the CEVA-MM3101 is a unique, fully programmable platform that is dedicated to addressing the extreme computational needs of the most sophisticated ISP and vision applications. The CEVA-MM3101 offers a scalable solution that can support a wide variety of products and use-cases. CEVA-MM3101 is augmented by a robust set of software libraries and technologies to accelerate the design of imaging and vision applications, including CEVA-CV computer vision libraries and Super Resolution technology.

By off-loading the device’s main CPU and replacing multiple hardwired accelerators for performance-intensive ISP and vision processing tasks, the highly-efficient CEVA-MM3101 dramatically reduces the power consumption of the overall system, while providing complete flexibility in terms of standards, ISP functions, and vision applications. Significantly, designers can leverage the CEVA-MM3101’s programmable architecture to implement their own proprietary software, thereby addressing unique use-cases and providing exceptional functionality that truly differentiates their products.

CEVA-MM3101 applications

The CEVA-MM3101 comprises a fully-programmable hardware platform (no hardwired accelerators that are “frozen in silicon”), a comprehensive library of video and imaging functions, including image pipeline kernels, linear and non-linear filters, pre and post-processing functions, face detection and video codec kernels, as well as a comprehensive development environment including an optimizing C compiler, debugger, profiler, cycle accurate simulator and hardware development boards. CEVA also provides an entire ecosystem in the form of the CEVAnet Partner Program, which leverages industry-leading technology providers who collaborate with CEVA to offer a comprehensive list of offerings based around the CEVA-MM3101.

The CEVA-MM3101 offers a flexible solution for every market requirement. As unique, fully programmable, pixel processing engine with inherent support for the most sophisticated imaging applications, it is targeted to manage different image and video pre and post processing, giving the user full flexibility to use its own proprietary algorithm for differentiate its device.

CEVA-MM3101 Target Applications

The CEVA-MM3101 can be used in SoCs that offload application processors (APs) in mobile devices and home entertainment systems. As image resolutions become higher, the pixels used to form the images become smaller and noisier. The result is that image pipeline algorithms become more complex and compute-intensive and are constantly changing. In turn, this means that the image pipeline needs to be implemented on a flexible, programmable platform that can be updated quickly and easily.

In addition to the image pipeline itself, mobile devices require additional complex functions, such as color and shading correction, image stabilization, wide dynamic range support, and other image enhancement functions. Also, both mobile and home entertainment devices are starting to demand support for scene analysis functions such as face tools (detection, recognition, and beautification; also features such red-eye detection and correction along with eye blinking and smile detection), motion detection, gesture recognition, and object detection. A good example of the level of sophistication required by modern devices is support for 2D to 3D real-time conversion in various applications, which involves detecting different objects in the scene and determining their relative sizes and positions.

The CEVA-MM3101 addresses all of these functions for the most demanding applications, including a full image pipeline up to 100 megapixels per second. It also supports JPEG encoding, which reduces the total system memory data bandwidth to the DDR. In addition to the scene analysis applications noted above, the CEVA-MM3101 is also optimized for display processing like frame rate up conversion, scaling, cropping, mirroring, and back light intensity control.

Features Benefits

Support for the full image pipeline as well as JPEG/JPEG2000 encoding

Implementing the image pipeline and image/video processing and encoding in the same engine reduces data and memory bandwidth. In turn, this reduces the overall power consumption of the system, simplifies the AP design, lowers the total BOM, and reduces the TTM.

Multipurpose platform that can support all video, ISP, and vision requirements

Supports the full image pipeline and pre- and post-processing algorithms such as scaling, mirroring, white balance, noise removal, and stabilization.

Software Programmable

Upgradeable through simple software-upgrades; enables product differentiation through software.

Enable constant changes and updates in image pipeline algorithms.

Optimized relationship between the AP/SoC and the display screen using special post-process algorithms.

Open architecture and standardized APIs

Additional software components can be easily developed or licensed through CEVA’s partners

Advanced IDE, optimizing C compiler, profiler, debugger and simulator, libraries, RTOS and device driver support

Eases software development, reduces resource requirements, and speeds time to market

Architectural Highlights

At the heart of the CEVA-MM3101 is a strong programmable Vector Processing (VP) engine. The Vector Processor performs filtering and the vector-type operations required for pixel processing. It is based on a dedicated pixel-processing VLIW/SIMD architecture with 10-stage pipeline. It contains 7 different units that can work in parallel enabling flexible combination for different type of instructions. All instructions are conditional execution using predication optimized to save code size. The VP can handle 32 byte operations in one cycle and contains special instructions that can be configured in order to create proprietary filters for video and imaging processing. This strong processor is optimized for multimedia operations, capable of 64 SAD calculations in one cycle as well as producing 8 results for 6 Tap filters – which make it ideal for image signal processing algorithms.

CEVA-MM3101 architecture

With built in techniques for reducing data bandwidth transfer from the DDR to the core and vice versa, and unique patents for data folding and processing on the fly and enhance internal memory structure, the VP can handle large amounts of data for burst mode image pipeline requirements as well as HD video encoding and decoding without hurting its performance. The VP architecture was specifically designed to meet the low-power requirements of mobile and home entertainment devices. Supplied with optimized kernels for image pre and post processing it enables CEVA customers, partners and 3rd party to develop their own proprietary applications easily and rapidly.